Chip giant Taiwan Semiconductor Manunfacturing Company previewed its upcoming 2-nanometre process the 2022 Technology Symposium held for North American customers.
Called N2, TSMC says the chip tech "represents another remarkable advancement" over its 3nm process that will enter volume production this year.
Using nanosheet transistors or gate-all-around field-effect transistors (GAAFET) instead of FinFET multi-gate metal oxide semiconductors, N2 chips are also set to come with backside power delivery (BDP) technology.
TSMC expects speed improvement with N2 to be 10 to 15 per cent over N3 at the same power levels.
This equates to a 25 to 30 per cent power reduction at the same chip speeds, TMSC said.
Announced in 2020, N2 is expected to enter production in 2025, with Apple believed to the first to launch chips with the TSMC ultra-fine process.
Apple's recently released M2 system-on-a-chip (SoC) is fabricated with TSMC's 5 nm technology.
At the symposium, TSMC also introduced the FINFLEX hybrid technology for its 3nm N3 chips.
FINFLEX allows chip designers to select multiple configurations on the same die and with the same toolset, spanning from 2-1 FIN for the highest power efficiency and density, to 3-2 FIN for top performance clock speeds.
A 2-2 FIN option provides an option for chip designers seeking balance between power consumption and performance.
Last year, rival chip maker Samsung announced it would make 3 nm chips with GAAFET this year, and release 2 nm variants in 2025.